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Integrated Circuits Inc.
APLUS
AP8942A
MAKE YOUR PRODUCTION A-PLUS
VOICE OTP IC AP8942A - 42sec
APLUS
INTEGRATED CIRCUITS INC.
Sales E-mail:
Address: 3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei, Taiwan 115, R.O.C. (115) 32 3 10. TEL: 886-2-2782-9266 FAX: 886-2-2782-9255 WEBSITE : http: //www.aplusinc.com.tw
sales@aplusinc.com.tw
Support E-mail:
service@aplusinc.com.tw
Ver 2.1
1
APR, 2007
Integrated Circuits Inc.
FEATURES
* * * * * * * *
AP8942A
Standard CMOS process. Embedded 1M bits EPROM. 42 sec Voice Length at 6KHz sampling and 4-bit ADPCM compression. Maximum 32 voice groups. Combination of voice blocks to extend playback duration. 960 table entries are available for voice block combinations. User selectable PCM or ADPCM data compression. Two triggering modes are available (EPROM programmable options). - Key Trigger Mode - Combinations of S1 ~ S8 to trigger 32 Voice Groups; SBT sequential trigger is possible. CPU Parallel Trigger Mode - Combinations of S1 ~ S5 with SBT goes HIGH to strobe start the voice playback.
* * * * * * * * * *
Voice Group Trigger Options: Edge / Level; Hold / Un-hold; Retrigger / Non-retrigger. Whole Chip Options: Ramp / No-ramp; Output Options; Key / CPU trigger mode. 16ms (@ 8KHz sampling rate) Debounce Time for both Key and CPU Trigger Mode. RST pin set to HIGH to stop playback at once. Two user programmable outputs for STOP pulse, BUSY signal and flashing LED. Built-in oscillator to control sampling frequency with an external resistor. 2.6V - 5.0V; Wide range single power supply and < 5uA low stand-by current. PWM Vout1 and Vout2 drive speaker directly. D/A COUT to drive speaker through an external BJT. Development System support voice compilation and options selection.
DESCRIPTION
AP8942A high performance Voice OTP is fabricated with Standard CMOS process with embedded 1M bits EPROM. It can store up to 42sec voice message with 4-bit ADPCM compression at 6KHz sampling rate. 8-bit PCM is also available as user selectable option. Two trigger modes, simple Key trigger mode and Parallel CPU trigger mode facilitate different user interface. User selectable triggering and output signal options provide maximum flexibility to various applications. Built-in resistor controlled oscillator, 8-bit current mode D/A output and PWM direct speaker driving output minimize the number of external components. PC controlled programmer and developing software are available.
Ver 2.1
2
APR, 2007
Integrated Circuits Inc.
PIN CONFIGURATIONS
S8 OUT1 VOUT1 VOUT2 VSS OUT2 V33 COUT OSC S5
AP8942A
S7 RST SBT S4 S3 VDD S2 S1 VPP S6
1 2 3 4 5 6 7 8 9 10
DIP / SOP
20 19 18 17 16 15 14 13 12 11
300 MIL
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
Ver 2.1
Playback Mode S8 OUT1 VOUT1 VOUT2 VSS OUT2 V33 COUT OSC S5 S6 VPP S1 S2 VDD S3 S4 SBT RST S7
OTP Program Mode OEB VSS IO V33 ACLK S5 S6 VPP S1 S2 VDD S3 S4 PGM DCLK S7
Description Trigger pin (input with internal pull-down) Programmable output (I/O pin) PWM output to drive speaker directly PWM output to drive speaker directly Power Ground Programmable output (I/O pin) Power Supply for OTP programming D/A current output Oscillator input Trigger pin (input with internal pull-down) Trigger pin (input with internal pull-down) Supply voltage for OTP programming Trigger pin (input with internal pull-down) Trigger pin (input with internal pull-down) Positive Power Supply Trigger (input with internal pull-down) Trigger (input with internal pull-down) Trigger pin (input with internal pull-down) Reset pin (input with internal pull-down) Trigger pin (input with internal pull-down)
3 APR, 2007
Integrated Circuits Inc.
PIN DESCRIPTIONS
S1 ~ S8
AP8942A
Input Trigger Pins: - S1 to S8 are used to trigger the 32 Voice Groups in Key Mode. - S1 to S5 together with SBT are used to trigger the 32 Voice Groups in CPU Parallel Mode. - In OTP Programming Mode, S1 to S7 are used as program enable pins. SBT Input Trigger Pin: - In Key Trigger Mode, this pin is trigger pin to trigger the playback of Voice Groups one by one sequentially. - In CPU Parallel Command Mode, this pin is used as address strobe to latch the input from S1 to S5 and starts the voice playback. - In OTP Programming Mode, this pin is used as PGM signal. VDD and V33 Power Supply Pin for normal and programming operation VSS Power Ground Pin VOUT1 and VOUT2 Digital PWM output pins which can drive speaker and buzzer directly for voice playback. OSC During voice playback, an external resistor is connected between this pin and the VDD pin to set the sampling frequency. In OTP Programming Mode, this is the ACLK input signal. VPP No connection during voice playback. separate 6.5V power supply. In OTP Programming Mode, this pin is connected to a
OUT1 and OUT2 - In Key Trigger Mode and CPU Parallel Command Mode, these pins are user programmable pins for the STOP pulse, BUSY and LED signals. - During OTP programming, OUT1 serves as OEB while OUT2 serves as data IO. COUT Analog 8-bit current mode D/A output for voice playback RST Chip reset in playback mode or DCLK pin in OTP programming mode.
Ver 2.1
4
APR, 2007
Integrated Circuits Inc.
VOICE SECTION COMBINATIONS
AP8942A
Voice files created by the PC base developing system are stored in the built-in EPROM of the AP8942A chip as a number of fixed length Voice Blocks. Voice Blocks are then selected and grouped into Voice Groups for playback. Up to 32 Voice Groups are allowed. A Voice Block Table is used to store the information of combinations of Voice Blocks and then group them together to form Voice Group. Chip Memory size Max no. of Voice Block No. of bytes per Voice Block Max. no. of Voice Group No. of Voice Table entries Voice Length (@ 6KHz 4-bit ADPCM) AP8942A 1M bits 252 512 32 960 42 sec
Example of Voice Block Combination Assume here we have three voice files, they are "How are You?", Sound Effect and Music. Each of the voice file is divided into a number of fixed length Voice Block and stored into the memory. Voice File 1 - "How are You?" is stored in Voice Block B0 to B12. Voice File 2 - Sound Effect is stored in Voice Block B13 to B15. Voice File 3 - Music is Voice Block B16 to B40. Voice Blocks are grouped together using Voice Table to form Voice Group for playback: Group no. Group 1 Group 2 Group 3 Group 4 Voice Group contents "How are You?" Sound Effect + "How are You?" "How are You?" + Music Music Voice Table Entries B0 ... B12 B13 ... B15 + B0 ... B12 B0 ... B12 + B16 ... B40 B16 ... B40
Voice Data Compression
Voice File data is stored in the on-chip EPROM as either 4-bit ADPCM or 8-bit PCM format. Voice data stored as 4-bit ADPCM provides 2:1 data compression which can save 50% of memory space. On the other hand, voice data are stored as 8-bit PCM format means no data compression is employed but voice playback quality will be better.
Ver 2.1 5 APR, 2007
Integrated Circuits Inc.
Programmable Options
AP8942A
In both Key Trigger Mode and CPU Parallel Trigger Mode, user can select different trigger functions and output signals to be sent out from the pins OUT1 and OUT2. Options affect all Voice Group playback are called Whole Chip Options. Options only affect the playback of individual Voice Group are called Group Options. Whole Chip Options * * Key or CPU Parallel Trigger Mode. Ramp-up-down enable or disable: When COUT is used for playback, Ramp-up-down should be enabled. This function eliminates the `POP' noise at the beginning and end of voice playback. When VOUT1 and VOUT2 are used to drive speaker directly, Ramp-up-down should be disabled.
Fig. 1 Ramp-up-down Enable *
Fig.2 Ramp-up-down Disable
Output Options: This option sets up the three output pins OUT1 and OUT2 to send out different signals during voice playback. Four settings are allowed: OUT1 Option 1 Option 2 Option 3 Option 4 LED2 LED2 LED2 STOP OUT2 LED1 STOP BUSY BUSY
Note: Stop plus must be set to enable in order to have STOP plus to come out.
Fig. 3
Ver 2.1 6
Output waveforms
APR, 2007
Integrated Circuits Inc.
Group Options
AP8942A
They are:
User selectable options that affect each individual group are called Group Options. * * * * Edge or Level trigger Unholdable or Holdable trigger Re-triggerable or non-retriggerable Stop pulse disable or enable
Fig. 4 to Fig. 9 show the voice playback with different combination of triggering mode and the relationship between outputs and voice playback.
Fig. 4
Level, Unholdable, Non-retriggerable
Fig. 5
Level Holdable
Fig. 6
Ver 2.1
SBT sequential trigger with Level Holdable and Unholdable
7 APR, 2007
Integrated Circuits Inc.
AP8942A
Fig. 7 Edge, Unholdable, Non-retrigger
Fig. 8
Edge, Holdable
Fig. 9
SBT sequential trigger with Edge Holdable and Unholdable
Ver 2.1
8
APR, 2007
Integrated Circuits Inc.
Overlap trigger is supported with Level/Unholdable trigger options:
AP8942A
Fig. 10
Overlap trigger
Ver 2.1
9
APR, 2007
Integrated Circuits Inc.
TRIGGER MODES
There are two triggering modes available with AP8942A.
AP8942A
Key or CPU Trigger modes are determined by setting the EPORM programmable options during voice data compilation. Key Trigger Mode With this trigger mode, up to 32 Voice Groups are triggered by setting S1 to S8 to HIGH or NC (not connected) in different combinations. Each Voice Group can have its only independent trigger options (See Fig. 4, 5, 7 and 8 for trigger options definition). Voice Groups can also be triggered sequentially by setting SBT pin to HIGH.
CPU Parallel Trigger Mode In this mode, S1 to S5 are set to HIGH or LOW according to the table above and followed by setting the SBT input pin to HIGH, the corresponding Voice Group will be triggered. Trigger options defined in Fig. 4, 5, 7 and 8 are valid for this mode.
Fig. 11
CPU Parallel Trigger Mode In stead, it
Note that SBT pin cannot be used as Single Button Sequential trigger in this mode. acts as a Strobe input to clock-in the data input from S1 to S5 into the chip.
Ver 2.1
10
APR, 2007
Integrated Circuits Inc.
Key Trigger Mode Up to 32 Voice Groups can be triggered by S1 to S8. Voice Group 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 S1 HIGH NC NC NC NC NC NC NC HIGH NC NC NC NC NC NC HIGH HIGH NC NC NC NC NC HIGH HIGH HIGH NC NC NC NC HIGH HIGH HIGH S2 NC HIGH NC NC NC NC NC NC HIGH HIGH NC NC NC NC NC NC HIGH HIGH NC NC NC NC NC HIGH HIGH HIGH NC NC NC NC HIGH HIGH S3 NC NC HIGH NC NC NC NC NC NC HIGH HIGH NC NC NC NC NC HIGH HIGH HIGH NC NC NC NC NC HIGH HIGH HIGH NC NC NC NC HIGH S4 NC NC NC HIGH NC NC NC NC NC NC HIGH HIGH NC NC NC NC NC HIGH HIGH HIGH NC NC NC NC HIGH HIGH HIGH HIGH NC NC NC NC S5 NC NC NC NC HIGH NC NC NC NC NC NC HIGH HIGH NC NC NC NC NC HIGH HIGH HIGH NC NC NC NC HIGH HIGH HIGH HIGH NC NC NC S6 NC NC NC NC NC HIGH NC NC NC NC NC NC HIGH HIGH NC NC NC NC NC HIGH HIGH HIGH NC NC NC NC HIGH HIGH HIGH HIGH NC NC
AP8942A
S7 NC NC NC NC NC NC HIGH NC NC NC NC NC NC HIGH HIGH NC NC NC NC NC HIGH HIGH HIGH NC NC NC NC HIGH HIGH HIGH HIGH NC
S8 NC NC NC NC NC NC NC HIGH NC NC NC NC NC NC HIGH HIGH NC NC NC NC NC HIGH HIGH HIGH NC NC NC NC HIGH HIGH HIGH HIGH
Ver 2.1
11
APR, 2007
Integrated Circuits Inc.
CPU Trigger Mode
AP8942A
Up to 32 Voice Groups can be triggered by supplying address to [S5:S1] with SBT as strobe signal. Voice Group 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Ver 2.1
S8 NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC
S7 NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC
S6 NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC
12
S5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
S4 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
S3 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
S2 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
S1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
APR, 2007
Integrated Circuits Inc.
BLOCK DIAGRAM
AP8942A
ABSOLUTE MAXIMUM RATINGS
Symbol VDD - VSS VIN VOUT T (Operating): T (Junction) T (Storage) Rating -0.5 ~ +6 Unit V V V
VSS - 0.3Ver 2.1
13
APR, 2007
Integrated Circuits Inc.
DC CHARACTERISTICS
( TA = 0 to 70, VDD = 4.5V, VSS = 0V )
AP8942A
Symbol Parameter
VDD ISB IOP VIH VIL IOL IOH ICO IOH IOL Operating Voltage Standby current Operating current "H" Input Voltage "L" Input Voltage VOUT low O/P Current VOUT high O/P Current COUT O/P Current O/P high Current O/P low Current
Min.
2.6 2.5 -0.3
Typ.
4.5 1 3.0 0 110 -110 -3 -8 8
Max.
5.0 5 15 3.5 0.5
Unit
V A mA V V mA mA mA mA mA
Condition
I/O open I/O open VDD=3.0V VDD=3.0V Vout=0.3V, VDD=5.0V Vout=2.5V, VDD=5.0V VCOUT=1.0V VOH=2.5V, VDD=5.0V VOL=0.3V, VDD=5.0V Fosc(5.0V) - Fosc(4.0V)
F/F
Frequency Stability
-5
+5
% Fosc(4.5V)
Ver 2.1
14
APR, 2007
Integrated Circuits Inc.
TIMING WAVEFORMS
KEY Trigger Mode
tKD S1~S8, SBT COUT STOP BUSY tBD tBH tSTPD
AP8942A
tSTPW
CPU Parallel Mode
Addr. S1~S5 SBT tAS tAH
tSBTW
AC CHARACTERISTICS
Symbol
tKD tKD tSTPD tSTPW tBD tBH tAS tAH tSBTW tLEDC
( TA = 0 to 70, VDD = 4.5V, VSS = 0V, 8KHz sampling ) Min.
16 24 100 100 65
Parameter
Key trigger debounce time Key trigger debounce time - retrigger STOP pulse output delay time STOP pulse width BUSY signal output delay time BUSY signal output hold time Address set-up time Address hold time SBT stroke pulse width LED flash frequency
Typ.
64 100 3
Max.
256 100
Unit
ms ms s ms ns ns ns ns s Hz
Note
1 1
1
1 2
Notes : 1. This parameter is inversely proportional to the sampling frequency. 2. This parameter is proportional to the sampling frequency.
Ver 2.1 15 APR, 2007
Integrated Circuits Inc.
OSCILLATOR RESISTANCE TABLE
Sampling Frequency KHz 22 18 16 15 13 12 11 10 9 8 7 6 ROSC K 83 108 125 134 158 168 183 202 227 252 296 344 ROSC K 400 370 350 330 300 280 250 220 200 170 150 120 100 91 82
AP8942A
Sampling Frequency KHz 5.4 5.9 6.3 6.5 7.0 7.6 8.5 9.5 10.3 11.9 13.8 16.5 19.3 20.5 22.4
Oscillator
Note: The data in the above tables are within 3% accuracy and measured at VDD = 4.5V. frequency is subjected to IC lot to lot variation.
FREQUENCY AGAINST VDD STABILITY
a P8 9 2 1 A Fre q e n c y St a b i l i t y (R o sc = 2 9 3 K Oh m ) 10.0% 5.0% 0.0% F (%) -5.0% -10.0% -15.0% -20.0% -25.0% -30.0% 5.50 5.00 4.50 4.00 3.50 3.00 2.60 VDD (V)
Ver 2.1
16
APR, 2007
Integrated Circuits Inc.
TYPICAL APPLICATIONS
AP8942A
0.1uF
Cin
4.7uF
0.1uF
VDD V33
Cout
1~2uF
8 Speaker
Rosc
RST OSC S1 COUT VOUT1 VOUT2 OUT1 S8 SBT VSS
8050D 16 Speaker 390
4.5~5V
S2 S3
1K
Fig. 12 Using 4.5V Battery Note 1: Two capacitors Cin and Cout must be connected from VDD and V33 pins to VSS to stabilize the power supply to the chip. When small capacity battery, e.g. AG10, is used, Cin and Cout may need to be as large as 22uF. However, if Cin and Cout is too large, the power-up reset generated by 0.1uF at the RST pin may not be function because it takes longer time for both Cin and Cout to discharge. Note 2: 16 Ohm speaker will provide lauder and better sound quality when the VOUT speaker direct drive is used. Note 3: The value of the 390 Ohm base resistor should be modified according to different Vdd value, the kind of speaker and NPN transistor. Note 4: The VPP pin should be leave unconnected for playback.
Ver 2.1
17
APR, 2007
Integrated Circuits Inc.
BONDING PADS
AP8942A
AP8942A
Fig. 12 Pad Locations
Notes: 1. VPP pad should be not connected during voice playback. 2. Substrate should be connected to the Power GND.
Ver 2.1
18
APR, 2007

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